Computer hardware can intercept and log traffic passing over a digital network or part of a digital network. Computer hardware units which perform switching (often called “switches”) of Ethernet packets, for example, have requirements for many kinds of functionality. One class of functionality is modifying packets, often based on matching the packet against an entry in a flow table. This match-action is part of the OpenFlow standard.
There are many types of packet manipulations which are useful, maybe even required functions, not specified by the OpenFlow standard. A desirable property of switches attempting to present a user model based on match-action is that they can perform general and diverse types of packet manipulations, so that they are capable of implementing the actions desired by the users programming these switches.
A high performance switch has limited time to process each packet. For example, a 64 port×10 Gbit per port switch has a total bandwidth of 640 Gb/sec. At a minimum Ethernet packet size of 64 bytes plus an interpacket gap of approximately 16 bytes, the maximum packet rate for such a switch is approximately 960M packets per second. A hardware packet processing pipeline running at 1 GHZ for example, sees one packet flowing through the pipeline every clock cycle (along with approximately 40 MHz of spare bandwidth). As a result, hardware which performs packet manipulations must either complete its function in a single clock cycle, or the hardware must be pipelined. In either case, hardware cannot be reused multiple times to do multiple computations for an individual packet. This makes it desirable to keep the packet manipulation hardware simple. Furthermore, there may be many copies of such hardware on an integrated circuit, providing further motivation to keep the hardware simple.